Load
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Load¶
Generate Address¶
Represents GEN_ADDR instruction.
Intrinsics Prototype and Arguments
__global void* gen_addr(int5 inx, int8_t tensor, int switches=0, __global void *income={}, bool predicate=1, bool polarity=0) |
inx |
Tensor coordinates (SRC1). |
tensor |
Tensor number. |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
Pointer in global address space, pointing to the selected tensor element.
Load local¶
Represents LD_L instruction.
Loads a scalar value from MMIO or SLM(Scalar Local Memory) into a SRF.
Intrinsics Prototype and Arguments
float s_f32_ld_l(uint32_t addr, int switches=0, float income={}, bool predicate=1, bool polarity=0) |
bf16 s_bf16_ld_l(uint32_t addr, int switches=0, bf16 income={}, bool predicate=1, bool polarity=0) |
int32_t s_i32_ld_l(uint32_t addr, int switches=0, int32_t income={}, bool predicate=1, bool polarity=0) |
uint32_t s_u32_ld_l(uint32_t addr, int switches=0, uint32_t income={}, bool predicate=1, bool polarity=0) |
int16_t s_i16_ld_l(uint32_t addr, int switches=0, int16_t income={}, bool predicate=1, bool polarity=0) |
uint16_t s_u16_ld_l(uint32_t addr, int switches=0, uint16_t income={}, bool predicate=1, bool polarity=0) |
int8_t s_i8_ld_l(uint32_t addr, int switches=0, int8_t income={}, bool predicate=1, bool polarity=0) |
uint8_t s_u8_ld_l(uint32_t addr, int switches=0, uint8_t income={}, bool predicate=1, bool polarity=0) |
bool s_i1_ld_l(uint32_t addr, int switches=0, bool income={}, bool predicate=1, bool polarity=0) |
addr |
Address to read from (SRC1). |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
Allowed switches are:
SW_MMIO - load from MMIO.
SW_SLM - load from SLM (the default).
The loaded scalar value from local memory.
Load local vector¶
Represents LD_L_V instruction.
Loads a vector from VLM(Vector Local Memory) into a VRF
Intrinsics Prototype and Arguments
float64 v_f32_ld_l_v_b(uint32_t addr, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_vb(uint32_t addr, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_b(uint32_t addr, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_l_v_b(uint32_t addr, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_l_v_b(uint32_t addr, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_l_v_b(uint32_t addr, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_l_v_b(uint32_t addr, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_l_v_b(uint32_t addr, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_l_v_b(uint32_t addr, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_l_v_b(uint32_t addr, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_l_v_vb(uint32_t addr, int switches, float64 income, bool64 predicate, bool polarity=0) |
int64 v_i32_ld_l_v_vb(uint32_t addr, int switches, int64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_l_v_vb(uint32_t addr, int switches, uint64 income, bool64 predicate, bool polarity=0) |
short128 v_i16_ld_l_v_vb(uint32_t addr, int switches, short128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_l_v_vb(uint32_t addr, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
char256 v_i8_ld_l_v_vb(uint32_t addr, int switches, char256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_l_v_vb(uint32_t addr, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_l_v_vb(uint32_t addr, int switches, bool256 income, bool256 predicate, bool polarity=0) |
addr |
Address to read from (SRC1). |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded vector value from local memory.
Load local vector high¶
Represents LD_L_V_HIGH instruction.
Intrinsics Prototype and Arguments
float64 v_f32_ld_l_v_high_vb(uint32_t addr, int switches, float64 income, bool64 predicate, bool polarity=0) |
float64 v_f32_ld_l_v_high_b(uint32_t addr, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_high_vb(uint32_t addr, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_high_b(uint32_t addr, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_l_v_high_vb(uint32_t addr, int switches, int64 income, bool64 predicate, bool polarity=0) |
int64 v_i32_ld_l_v_high_b(uint32_t addr, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_l_v_high_vb(uint32_t addr, int switches, uint64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_l_v_high_b(uint32_t addr, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_l_v_high_vb(uint32_t addr, int switches, short128 income, bool128 predicate, bool polarity=0) |
short128 v_i16_ld_l_v_high_b(uint32_t addr, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_l_v_high_vb(uint32_t addr, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_l_v_high_b(uint32_t addr, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_l_v_high_vb(uint32_t addr, int switches, char256 income, bool256 predicate, bool polarity=0) |
char256 v_i8_ld_l_v_high_b(uint32_t addr, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_l_v_high_vb(uint32_t addr, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_l_v_high_b(uint32_t addr, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_l_v_high_vb(uint32_t addr, int switches, bool256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_l_v_high_b(uint32_t addr, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
addr |
Address to read from (SRC1). |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded half vector value from local memory.
Load local vector low¶
Represents LD_L_V_LOW instruction.
Intrinsics Prototype and Arguments
float64 v_f32_ld_l_v_low_vb(uint32_t addr, int switches, float64 income, bool64 predicate, bool polarity=0) |
float64 v_f32_ld_l_v_low_b(uint32_t addr, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_low_vb(uint32_t addr, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_l_v_low_b(uint32_t addr, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_l_v_low_vb(uint32_t addr, int switches, int64 income, bool64 predicate, bool polarity=0) |
int64 v_i32_ld_l_v_low_b(uint32_t addr, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_l_v_low_vb(uint32_t addr, int switches, uint64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_l_v_low_b(uint32_t addr, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_l_v_low_vb(uint32_t addr, int switches, short128 income, bool128 predicate, bool polarity=0) |
short128 v_i16_ld_l_v_low_b(uint32_t addr, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_l_v_low_vb(uint32_t addr, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_l_v_low_b(uint32_t addr, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_l_v_low_vb(uint32_t addr, int switches, char256 income, bool256 predicate, bool polarity=0) |
char256 v_i8_ld_l_v_low_b(uint32_t addr, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_l_v_low_vb(uint32_t addr, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_l_v_low_b(uint32_t addr, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_l_v_low_vb(uint32_t addr, int switches, bool256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_l_v_low_b(uint32_t addr, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
addr |
Address to read from (SRC1). |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded half vector value from local memory.
Load Global¶
Represents LD_G instruction. Loads a single scalar value from global memory, if the destination is a vector register, the value is being replicated across all lanes.
Load a value from the given address. If the value is stored into a VRF then the same value is broadcasted to the entire vector register.
Intrinsics Prototype and Arguments
float s_f32_ld_g(__global void *addr, int switches=0, float income={}, bool predicate=1, bool polarity=0) |
bf16 s_bf16_ld_g(__global void *addr, int switches=0, bf16 income={}, bool predicate=1, bool polarity=0) |
int32_t s_i32_ld_g(__global void *addr, int switches=0, int32_t income={}, bool predicate=1, bool polarity=0) |
uint32_t s_u32_ld_g(__global void *addr, int switches=0, uint32_t income={}, bool predicate=1, bool polarity=0) |
int16_t s_i16_ld_g(__global void *addr, int switches=0, int16_t income={}, bool predicate=1, bool polarity=0) |
uint16_t s_u16_ld_g(__global void *addr, int switches=0, uint16_t income={}, bool predicate=1, bool polarity=0) |
int8_t s_i8_ld_g(__global void *addr, int switches=0, int8_t income={}, bool predicate=1, bool polarity=0) |
uint8_t s_u8_ld_g(__global void *addr, int switches=0, uint8_t income={}, bool predicate=1, bool polarity=0) |
bool s_i1_ld_g(__global void *addr, int switches=0, bool income={}, bool predicate=1, bool polarity=0) |
bfloat128 v_bf16_ld_g(__global void *addr, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_g(__global void *addr, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_g(__global void *addr, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_g(__global void *addr, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_g(__global void *addr, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_g(__global void *addr, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_g(__global void *addr, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_g(__global void *addr, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
addr |
Address to read from (SRC1). |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded scalar value from global memory.
Load Tensor¶
Represents LD_TNSR instruction.
Loads a vector register with the values from the given tensor based on specified index values.
Intrinsics Prototype and Arguments
float64 v_f32_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_tnsr_b(int5 ndx, const int8_t tensor, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, float64 income, bool64 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
int64 v_i32_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, int64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, uint64 income, bool64 predicate, bool polarity=0) |
short128 v_i16_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, short128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
char256 v_i8_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, char256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_tnsr_vb(int5 ndx, int8_t tensor, int switches, bool256 income, bool256 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_b(int5 ndx, int8_t tensor, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
ndx |
Tensor coordinates (SRC1). |
tensor |
Tensor number. |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded values.
Load tensor using PARTIAL switch¶
Represents LD_TNSR instruction with PARTIAL switch. Loads elements from global memory into a subset of vector lanes.
Intrinsics Prototype and Arguments
float64 v_f32_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_tnsr_partial_b(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, float64 income, bool64 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
int64 v_i32_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, int64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, uint64 income, bool64 predicate, bool polarity=0) |
short128 v_i16_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, short128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
char256 v_i8_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, char256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_tnsr_partial_vb(int5 ndx, int8_t tensor, int8_t size, int8_t offset, int switches, bool256 income, bool256 predicate, bool polarity=0) |
ndx |
Tensor coordinates (SRC1). |
tensor |
Tensor number. |
size |
Size in elements minus 1. |
offset |
Offset in elements. |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded values.
Load tensor high¶
Represents LD_TNSR_HIGH instruction.
Intrinsics Prototype and Arguments
float64 v_f32_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_tnsr_high_b(int5 ndx, const int8_t tensor, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, float64 income, bool64 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
int64 v_i32_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, int64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, uint64 income, bool64 predicate, bool polarity=0) |
short128 v_i16_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, short128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
char256 v_i8_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, char256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_tnsr_high_vb(int5 ndx, int8_t tensor, int switches, bool256 income, bool256 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_high_b(int5 ndx, int8_t tensor, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
ndx |
Tensor coordinates (SRC1). |
tensor |
Tensor number. |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded values.
Load tensor low¶
Represents LD_TNSR_LOW instruction.
Intrinsics Prototype and Arguments
float64 v_f32_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, float64 income={}, bool predicate=1, bool polarity=0) |
int64 v_i32_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, int64 income={}, bool predicate=1, bool polarity=0) |
uint64 v_u32_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, uint64 income={}, bool predicate=1, bool polarity=0) |
short128 v_i16_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, short128 income={}, bool predicate=1, bool polarity=0) |
ushort128 v_u16_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, ushort128 income={}, bool predicate=1, bool polarity=0) |
char256 v_i8_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, char256 income={}, bool predicate=1, bool polarity=0) |
uchar256 v_u8_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, uchar256 income={}, bool predicate=1, bool polarity=0) |
bool256 v_i1_ld_tnsr_low_b(int5 ndx, const int8_t tensor, int switches=0, bool256 income={}, bool predicate=1, bool polarity=0) |
float64 v_f32_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, float64 income, bool64 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, bfloat128 income, bool128 predicate, bool polarity=0) |
int64 v_i32_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, int64 income, bool64 predicate, bool polarity=0) |
uint64 v_u32_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, uint64 income, bool64 predicate, bool polarity=0) |
short128 v_i16_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, short128 income, bool128 predicate, bool polarity=0) |
ushort128 v_u16_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, ushort128 income, bool128 predicate, bool polarity=0) |
char256 v_i8_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, char256 income, bool256 predicate, bool polarity=0) |
uchar256 v_u8_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, uchar256 income, bool256 predicate, bool polarity=0) |
bool256 v_i1_ld_tnsr_low_vb(int5 ndx, int8_t tensor, int switches, bool256 income, bool256 predicate, bool polarity=0) |
bfloat128 v_bf16_ld_tnsr_low_b(int5 ndx, int8_t tensor, int switches=0, bfloat128 income={}, bool predicate=1, bool polarity=0) |
ndx |
Tensor coordinates (SRC1). |
tensor |
Tensor number. |
switches |
Instruction switches. |
income |
This value is returned if the predicate is false. |
predicate |
Predicate value for the instruction. |
polarity |
True if polarity of the predicate is inverted. |
The loaded value.